Unit 1
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VLSI DESIGN
Introduction
to VLSI
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Manufacturing
process of CMOS integrated circuits
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CMOS n-well
process design rules
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Packaging
integrated circuits
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Trends in
process technology
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MOS transistor
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Energy band
diagram of MOS system
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MOS under
external bias
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derivation of
threshold voltage equation
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Secondary
effects in MOSFETS
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Unit 2
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MOSFET scaling
and small geometry effects
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MOScapacitances
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Modeling of
MOS transistors using SPICE
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Capacitance
models
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The Wire:
Interconnect parameters: capacitance
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Resistanceand
inductance
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Electrical
wire models: The ideal wire
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The
lumpedmodel
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The lumped RC
model
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The
distributed RC model
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The
transmission line model
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SPICE wire
models
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Unit 3
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MOS inverters
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Resistive load
inverter
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Inverter with
n-type MOSFET load
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CMOS inverter:
Switching Threshold
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Noise Margin
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Dynamic
behavior of CMOS inverter
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Computing
capacitances
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Propagation
delay
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Dynamic and
Static power consumption
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Energy and
energy delay product calculations
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Stick diagram
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IC layout
design and tools
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B.TECH 6TH SEMESTER (ELECTRONICS AND COMMUNICATION ENGINEERING)
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